dr. Kim

Postdoc
Electronic Instrumentation (EI), Department of Microelectronics

Expertise: Ultrasound ASICs and data converters

Themes: Smart Ultrasound

Biography

Taehoon Kim received the B.S., M.S., and Ph.D. degrees in electrical and computer engineering from Seoul National University, Seoul, Korea, in 2009, 2012 and 2017, respectively.
From 2017 to 2018, he was with ASIC & IP development team in Samsung Electronics, Hwasung, Korea. From June 2018, he starts as a postdoc researcher in Electronic Instrumentation Lab, TU Delft. His research interests include front-end electronics for ultrasound medical imaging application.

Ultra-X-treme: Ultrafast Ultrasound Imaging for Extended Diagnosis and Treatment of Vascular Disease

The NWO Perspectief Programme Ultra-X-treme is a 4 Meuro programme in which 5 academic centers and 8 companies collaborate to develop patient-specific ultrasound-based techniques to diagnose and treat vascular disease

  1. A 2000-Volumes/s 3D Ultrasound Imaging Chip with Monolithically-Integrated 11.7x23.4mm2 2048-Element CMUT Array and Arbitrary-Wave TX Beamformer
    Nuriel N.M. Rozsa; Zhao Chen; Taehoon Kim; Peng Guo; Yannick Hopf; Jason Voorneveld; Djalma Simoes dos Santos; Emile Noothout; Zu-Yao Chang; Chao Chen; Vincent A. Henneken; Nico de Jong; Hendrik J. Vos; Johan G. Bosch; Martin D. Verweij; Michiel A. P. Pertijs;
    In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
    2024. Accepted.

  2. A Tiled Ultrasound Matrix Transducer for Volumetric Imaging of the Carotid Artery
    dos Santos, Djalma Simões; Fool, Fabian; Mozaffarzadeh, Moein; Shabanimotlagh, Maysam; Noothout, Emile; Kim, Taehoon; Rozsa, Nuriel; Vos, Hendrik J.; Bosch, Johan G.; Pertijs, Michiel A. P.; Verweij, Martin D.; de Jong, Nico;
    Sensors,
    Volume 22, Issue 24, pp. 1--23, 2022. DOI: 10.3390/s22249799
    Abstract: ... High frame rate three-dimensional (3D) ultrasound imaging would offer excellent possibilities for the accurate assessment of carotid artery diseases. This calls for a matrix transducer with a large aperture and a vast number of elements. Such a matrix transducer should be interfaced with an application-specific integrated circuit (ASIC) for channel reduction. However, the fabrication of such a transducer integrated with one very large ASIC is very challenging and expensive. In this study, we develop a prototype matrix transducer mounted on top of multiple identical ASICs in a tiled configuration. The matrix was designed to have 7680 piezoelectric elements with a pitch of 300 μm × 150 μm integrated with an array of 8 × 1 tiled ASICs. The performance of the prototype is characterized by a series of measurements. The transducer exhibits a uniform behavior with the majority of the elements working within the −6 dB sensitivity range. In transmit, the individual elements show a center frequency of 7.5 MHz, a −6 dB bandwidth of 45%, and a transmit efficiency of 30 Pa/V at 200 mm. In receive, the dynamic range is 81 dB, and the minimum detectable pressure is 60 Pa per element. To demonstrate the imaging capabilities, we acquired 3D images using a commercial wire phantom.

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  3. Large Matrix array aperture for 3D vascular imaging capture
    Q. Colas; C. Bantignies; M. Perroteau; N. Porcher; S. Vassal; B. Guérif; T. Kim; J. G. Bosch; N. de Jong; M. D. Verweij; M. A. P. Pertijs; G. Férin; M. Flesch;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    2022.

  4. Automated Characterization of Matrix Transducer Arrays using the Verasonics Imaging System
    Djalma Simoes dos Santos; Fabian Fool; Taehoon Kim; Emile Noothout; Nuriel Rozsa; Hendrik J. Vos; Johan G. Bosch; Michiel A. P. Pertijs; Martin D. Verweij; Nico de Jong;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    2022.

  5. Automated Characterization of Matrix Transducer Arrays using the Verasonics Imaging System
    Djalma Simoes dos Santos; Fabian Fool; Taehoon Kim; Emile Noothout; Nuriel Rozsa; Hendrik J. Vos; Johan G. Bosch; Michiel A. P. Pertijs; Martin D. Verweij; Nico de Jong;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    2022.

  6. Large Matrix array aperture for 3D vascular imaging capture
    Q. Colas; C. Bantignies; M. Perroteau; N. Porcher; S. Vassal; B. Guérif; T. Kim; J. G. Bosch; N. de Jong; M. D. Verweij; M. A. P. Pertijs; G. Férin; M. Flesch;
    In Smart Systems Integration Conference,
    2022. abstract.

  7. Design of an Ultrasound Transceiver ASIC with a Switching-Artifact Reduction Technique for 3-D Carotid Artery Imaging
    T. Kim; F. Fool; D. Simoes dos Santos; Z. Y. Chang; E. Noothout; H. J. Vos; J. G. Bosch; M. D. Verweij; N. de Jong; M. A. P. Pertijs;
    Sensors,
    Volume 21, Issue 1, pp. 150, January 2021. DOI: 10.3390/s21010150
    Abstract: ... This paper presents an ultrasound transceiver application-specific integrated circuit (ASIC) directly integrated with an array of 12 × 80 piezoelectric transducer elements to enable next-generation ultrasound probes for 3D carotid artery imaging. The ASIC, implemented in a 0.18 µm high-voltage Bipolar-CMOS-DMOS (HV BCD) process, adopted a programmable switch matrix that allowed selected transducer elements in each row to be connected to a transmit and receive channel of an imaging system. This made the probe operate like an electronically translatable linear array, allowing large-aperture matrix arrays to be interfaced with a manageable number of system channels. This paper presents a second-generation ASIC that employed an improved switch design to minimize clock feedthrough and charge-injection effects of high-voltage metal–oxide–semiconductor field-effect transistors (HV MOSFETs), which in the first-generation ASIC caused parasitic transmissions and associated imaging artifacts. The proposed switch controller, implemented with cascaded non-overlapping clock generators, generated control signals with improved timing to mitigate the effects of these non-idealities. Both simulation results and electrical measurements showed a 20 dB reduction of the switching artifacts. In addition, an acoustic pulse-echo measurement successfully demonstrated a 20 dB reduction of imaging artifacts.

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  8. Experimental Investigation of the Effect of Subdicing on an Ultrasound Matrix Transducer
    D. Simoes dos Santos; F. Fool; T. Kim; E. Noothout; H. J. Vos; J. G. Bosch; M. A. P. Pertijs; M. D. Verweij; N. de Jong;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    September 2021. DOI: 10.1109/ius52206.2021.9593315
    Abstract: ... Over the past decades, real-time three-dimensional (3D) medical ultrasound has attracted much attention since it enables clinicians to diagnose more accurately. This calls for ultrasound matrix transducers with a large number of elements, which can be interfaced with an application-specific integrated circuit (ASIC) for data reduction. An important aspect of the design of such a transducer is the geometry of each element, since it affects the mode of vibration and, consequently, the efficiency of the transducer. In this paper, we experimentally investigate the effect of subdicing on a piezoelectric (PZT) transducer. We fabricate and acoustically characterize a prototype PZT matrix transducer built on top of ASICs. The prototype transducer contains subdiced and non-subdiced elements, whose performance can be directly compared under the same conditions. Measurement results show that subdiced elements have a better performance compared to non-subdiced ones. Subdicing increases the peak pressure by 25%, raises the bandwidth by 10% and reduces the ringing time by 25%.

  9. A 12×80 Element Ultrasound Transceiver ASIC With Enhanced Charge Injection Performance for 3-D Carotid Artery Imaging
    T. Kim; F. Fool; E. Kang; Z. Y. Chang; E. Noothout; J. G. Bosch; M. D. Verweij; N. de Jong; M. Pertijs;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    September 2020. abstract.

  10. 3D High Frame Rate Imaging Scheme for Ultrasound Carotid Imaging
    M. Soozande; M. Mozzaffarzadeh; F. Fool; T. Kim; E. Kang; M. Pertijs; M. Verweij; H. J. Vos; J. G. Bosch; N. de Jong;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    September 2020. abstract.

  11. A 5800 μm2 Resistor-based Temperature Sensor with a one-point Trimmed 3σ Inaccuracy of ±1.1 °C from −50 to 105 °C in 65 nm CMOS
    Y-T Lee; W. Choi; T. Kim; S. Song; K. Makinwa; Y. Chae;
    IEEE Solid-State Circuits Letters,
    Volume 2, pp. 67-70, 10 2019. DOI: 10.1109/LSSC.2019.2937441
    Abstract: ... This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor, fabricated in 65-nm CMOS, occupies 5800 μm 2 and achieves moderate accuracy [±1.2 °C (3σ)] over a wide temperature range (-50 °C to 105 °C) after a one-point trim. This is 2x better than the previous compact resistor-based sensors. Operating from 0.85 to 1.3-V supplies, it consumes 32.5-μA and achieves 2.8-mK resolution in a 1-ms conversion time, which corresponds to a resolution FoM of 0.26 pJ·K 2.

  12. 3D high frame rate flow measurement using a prototype matrix transducer for carotid imaging
    F. Fool; H. J. Vos; M. Shabanimotlagh; T. Kim; E. Kang; M. Pertijs; N. de Jong; M. D. Verweij;
    In Proc. IEEE International Ultrasonics Symposium (IUS),
    IEEE, pp. 1-4, October 2019.

  13. A 5800 μm2 Resistor-based Temperature Sensor with a one-point Trimmed 3σ Inaccuracy of ±1.1 °C from −50 to 105 °C in 65 nm CMOS
    Y-T Lee; W. Choi; T. Kim; S. Song; K. Makinwa; Y. Chae;
    In Proc. European Solid-State Circuits Conference (ESSCIRC),
    9 2019. DOI: 10.1109/ESSCIRC.2019.8902650

  14. A 5800 μm2 Resistor-based Temperature Sensor with a one-point Trimmed 3σ Inaccuracy of ±1.1 °C from −50 to 105 °C in 65 nm CMOS
    Y-T Lee; W. Choi; T. Kim; S. Song; K. Makinwa; Y. Chae;
    In Proc. European Solid-State Circuits Conference (ESSCIRC),
    pp. 68-71, 9 2019. DOI: 10.1109/ESSCIRC.2019.8902650

  15. A Compact Resistor-Based CMOS Temperature Sensor With an Inaccuracy of 0.12 °C (3σ) and a Resolution FoM of 0.43 pJ⋅K^2 in 65-nm CMOS
    W. Choi; Y. Lee; S. Kim; S. Lee; J. Jang; J. Chun; K. A. A. Makinwa; Y. Chae;
    IEEE Journal of Solid-State Circuits,
    Volume 53, Issue 12, pp. 3356-3367, 12 2018. DOI: 10.1109/JSSC.2018.2871622
    Abstract: ... This paper presents a compact resistor-based CMOS temperature sensor intended for dense thermal monitoring. It is based on an RC poly-phase filter (PPF), whose temperature-dependent phase shift is read out by a frequency-locked loop (FLL). The PPF's phase shift is determined by a zero-crossing (ZC) detector, allowing the rest of the FLL to be realized in an area-efficient manner. Implemented in a 65-nm CMOS technology, the sensor occupies only 7000 μm². It can operate from supply voltages as low as 0.85 V and consumes 68 μW. A sensor based on a PPF made from silicided p-poly resistors and metal-insulator-metal (MIM) capacitors achieves an inaccuracy of ±0.12 °C (3σ) from -40 °C to 85 °C and a resolution of 2.5 mK (rms) in a 1-ms conversion time. This corresponds to a resolution figure-of-merit (FoM) of 0.43 pJ·K².

  16. A Compact Resistor-Based CMOS Temperature Sensor With an Inaccuracy of 0.12 °C (3σ) and a Resolution FoM of 0.43 pJ⋅K^2 in 65-nm CMOS
    W. Choi; Y. Lee; S. Kim; S. Lee; J. Jang; J. Chun; K. A. A. Makinwa; Y. Chae;
    IEEE Journal of Solid-State Circuits,
    Volume 53, Issue 12, pp. 3356-3367, 12 2018. DOI: 10.1109/JSSC.2018.2871622
    Abstract: ... This paper presents a compact resistor-based CMOS temperature sensor intended for dense thermal monitoring. It is based on an RC poly-phase filter (PPF), whose temperature-dependent phase shift is read out by a frequency-locked loop (FLL). The PPF's phase shift is determined by a zero-crossing (ZC) detector, allowing the rest of the FLL to be realized in an area-efficient manner. Implemented in a 65-nm CMOS technology, the sensor occupies only 7000 μm². It can operate from supply voltages as low as 0.85 V and consumes 68 μW. A sensor based on a PPF made from silicided p-poly resistors and metal-insulator-metal (MIM) capacitors achieves an inaccuracy of ±0.12 °C (3σ) from -40 °C to 85 °C and a resolution of 2.5 mK (rms) in a 1-ms conversion time. This corresponds to a resolution figure-of-merit (FoM) of 0.43 pJ·K².

  17. A 0.53pJK2 7000μm2 resistor-based temperature sensor with an inaccuracy of ±0.35°C (3σ) in 65nm CMOS
    W. Choi; Y.T. Lee; S. Kim; S. Lee; J. Jang; J. Chun; K.A.A. Makinwa; Y. Chae;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 322-324, 2 2018. DOI: 10.1109/ISSCC.2018.8310314

  18. A 0.53pJK2 7000μm2 resistor-based temperature sensor with an inaccuracy of ±0.35°C (3σ) in 65nm CMOS
    W. Choi; Y.T. Lee; S. Kim; S. Lee; J. Jang; J. Chun; K.A.A. Makinwa; Y. Chae;
    In Dig. Techn. Papers IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 322-324, 2 2018. DOI: 10.1109/ISSCC.2018.8310314

  19. A 0.02mm2 Embedded Temperature Sensor with ±2°C Inaccuracy for Self-Refresh Control in 25nm Mobile DRAM
    Y.Y. Kim; W. Choi; J. Kim; S. Lee; S Lee; H. Kim; K.A.A. Makinwa; Y. Chae; TW Kim;
    In W Pribyl; F Dielacher; G Hueber (Ed.), Proc. European Solid-State Circuits Conference (ESSCIRC),
    IEEE, pp. 267-270, 2015.

  20. A 60nV/Hz 15-channel digital active electrode system for portable biopotential signal acquisition
    J. Xu; B. Busze; H. Kim; K.A.A. Makinwa; C. van Hoof; R.F. Yazicioglu;
    In LC Fujino; J Anderson; D Dunwell; V Gaudet; G Gulak; J Haslett; S Mirabbasi; K Pagiamtzis; KC. Smith (Ed.), Digest of Technical papers - 2014 IEEE International Solid-State Circuits Conference,
    IEEE, pp. 424-425, 2014. Harvest Session 24. Integrated Biomedical Systems 24.7.

  21. Smart CMOS image sensor with high SBR and subpixel resolution for light-selection-based range finding
    J. Cheon; Y. Chae; D. Kim; S. Lim; I. Lee; K. Lee; D.J. Kim; G. Han;
    IEEE Electron Device Letters,
    Volume 56, Issue 11, pp. 2546-2555, 2009.

  22. Photoelectric device using PN diode and silicon integrated circuits (IC) comprising the smae photoelectric device
    B. Mheen; J. U-park; G. Ok Kim; Y. An im; H. Su kim;
    2007.

  23. Optical device including gate insulator with modulated thickness
    H. Su kim; B. Mheen; G. Ok Kim;
    2007.

BibTeX support

Last updated: 5 Jan 2022

Taehoon Kim

Alumnus
  • Left in 2021

MSc students